动态传感器网络区域受限的移动sink路径选择研究

针对sink区域受限及节点特征参数的问题,如何规划sink路径选择以满足动态传感器网络高效数据收集及低能耗的要求,提出了一种动态传感器网络区域受限的移动sink路径选择方法。该方法在缓存节点辅助通信模式下,建立sink受限区域图模型。针对不同应用情况,分别讨论了sink移动全局路径信息已知和sink移动局部路径信息已知这两种情况下的最优移动路径。在全局路径信息已知时,采用Vornon单元划分的思想求解总传输能耗和节点平均负载;在局部路径信息已知时,采用启发式策略进行路径寻优,并证明其路径寻优的正确性。最后通过仿真实验与理论计算来验证移动sink最佳路径寻优策略的有效性和可行性。     

一种闪存敏感的多级缓存管理方法

基于闪存的固态硬盘(solid state driver,简称SSD)已经广泛应用于各种移动设备、PC机和服务器.与磁盘相比,尽管SSD具有数据存取速度高、抗震、低功耗等优良特性,但SSD自身也存在读写不对称、价格昂贵等不利因素,这使得SSD 短期内不会完全取代磁盘.将SSD和磁盘组合构建混合系统,可以发挥不同的硬件特性,提升系统性能.基于 MLC 型 SSD 和 SLC 型 SSD 之间的特性差异,提出了一种闪存敏感的多级缓存管理策略——FAMC.FAMC将SSD用在内存和磁盘之间作扩展缓存,针对数据库系统、文件管理中数据访问的特点,有选择地将内存牺牲页缓存到不同类型的SSD.FAMC同时考虑写请求模式和负载类型对系统性能的影响,设计实现对SSD友好的数据管理策略.此外,FAMC基于不同的数据置换代价提出了适用于SSD的缓冲区管理算法.基于多级缓存存储系统对FAMC的性能进行了评测,实验结果表明,FAMC可以大幅度降低系统响应时间,减少磁盘I/O.     

基于预测与优先级缓存的MIPv6切换算法

为了提升移动IPv6的切换性能,保证实时性要求高的音频、视频等业务的服务质量,针对去除DAD过程的RDMIPv6方案未考虑在传输速率相对较慢的无线信道中,移动节点向NAR本地注册所产生的时延以及切换过程中引入的丢包问题,提出一种优化方案PCRD-MIPv6。PCRD-MIPv6方案结合基于L2触发的切换预测和数据包优先级缓存机制,在L2切换完成之前向移动节点MN维护的接入路由器缓存列表T_AR中的所有AR发送MOA实现本地注册,与此同时,将切换过程中的数据包按优先级缓存在PAR中,在切换完成后发往移动节点,从而减少切换过程中的丢包率。NS-2仿真结果表明,PCRD-MIPv6方案有效地减少了切换时延,降低了切换过程中的丢包率。     

Deposition and characterisation of TiO2 coatings on various supports for structured (photo)catalytic reactors

Different types of aqueous TiO₂–P25 suspensions were prepared and their properties, including rheological behaviour and zeta potential, were studied. Then, TiO₂ suspensions were used to elaborate TiO₂ coatings on various substrates (cordierite monolith, stainless steel plates and -SiC foam) using a dip-coating method. The relationship between the suspension stability and the coating adhesion has been considered. The structural and morphological characterisation of TiO₂ coatings has been performed using scanning electron microscopy, X-ray diffraction and other methods. Finally, the photocatalytic properties of the materials have been determined by studying the photooxidation of aqueous ammonia.     

Scalable wideband equivalent circuit model for silicon-based on-chip transmission lines

A scalable wideband equivalent circuit model of silicon-based on-chip transmission lines is presented in this paper along with an efficient analytical parameter extraction method based on improved characteristic function approach, including a relevant equation to reduce the deviation caused by approximation. The model consists of both series and shunt lumped elements and accounts for high-order parasitic effects. The equivalent circuit model is derived and verified to recover the frequency-dependent parameters at a range from direct current to 50 GHz accurately. The scalability of the model is proved by comparing simulated and measured scattering parameters with the method of cascade, attaining excellent results based on samples made from CMOS 0.13 and 0.18μm process.     

Achieving efficient location privacy protection based on cache

With the development of mobile Internet and the popularization of intelligent terminals,location based services(LBS) has been widespread in navigation,social network and other fields.Due to the sensitivity of personal location information,data privacy protection related to location of mobile objects has become the hotspots of research.Considering the openness of the background information,and based on the information cache mechanism,a dummy selection algorithm was proposed to reduce the number of interactions between the user and the untrusted server and combine the k-anonymity to achieve efficient location privacy.Without relying on trusted third party,the scheme can prevent the attackers owned background information from inference attack,and the detail simulation results indicate its effectiveness and efficiency.     

智能电网调度控制系统中历史数据服务优化方案

在智能电网调度控制系统中,历史数据存储规模呈爆发式增长态势,海量历史数据的冲击,影响了数据访问效率,为满足历史数据高效访问的需求,针对历史数据服务提出了全新的解决方案。文中提出增加历史数据缓冲区,缓存管理电网热点数据,提高数据处理效率,减轻历史库负载;优化任务分配器,协调数据缓存区与关系库分工作业,对历史数据服务进行有效的管理和调度;设计历史数据会话监听机制,实时监视数据库会话状态,保障历史数据服务的安全性和稳定性。实践证明,基于缓存的历史数据服务能够满足爆发式海量数据场景下的数据访问需求,保障电网调度控制系统的安全稳定运行。     

RTL综合中FPGA片上RAM工艺映射

RAM（Random-Access-Memory,随机存储器）是FPGA（Field Programmable Gate Arrays）片上最重要的宏单元之一,RTL（Register-Transfer-Level）综合对FPGA开发中RAM的有效利用起至关重要作用.本文针对RTL综合中RAM源描述和目标结构多样化带来的技术难题,提出了一种RAM工艺映射方法,即建立工艺无关的RAM统一模型,在模型基础上通过建模、模式匹配、造价计算、绑定四步实现.该方法应用于RTL综合,可以将多种RAM源描述有效地映射到最佳类型和数量的FPGA片上RAM资源.实验数据表明采用该方法实现的RAM工艺映射效果和主流FPGA综合工具--Synplify和XST相当,该模块已经集成在自主开发的RTL综合工具--Hqsyn中并实现商用.     

一种低功耗Cache设计技术的研究

低功耗、高性能的cache系统设计是嵌入式DSP芯片设计的关键。本文在多媒体处理DSP芯片MD32的设计实践中，提出一种利用读／写缓冲器作为零级cache，减少对数据、指令cache的读／写次数，由于缓冲器读取功耗远远小于片上cache，从而减小cache相关功耗的方法。通过多种多媒体处理测试程序的验证，该技术可减少对指令cache或者数据cache20％～40％的读取次数，以较小芯片面积的增加换取了较大的功耗降低。     

An accurate and practical buffer allocation model for the buffer cache based on marginal gains

A new dynamic buffer allocation strategy based on the notion of marginal gains is presented for the buffer cache that is used by the operating system to store frequently accessed disk blocks in main memory, and the performance of the proposed strategy is compared with those of previous allocation strategies. In the proposed strategy, marginal gain values are predicted by exploiting functions that approximate the expected number of buffer hits per unit time. Experimental results from both trace-driven simulation and an actual implementation in the FreeBSD operating system show that the proposed strategy accurately predicts the marginal gain values for various workloads resulting in significantly improved buffer hit ratios.